Wafer-level reliability test system(CWBS1000)

The system is suitable for electrical reliability test for controllable high temperature for 6/8-inch wafer-level devices based on JEDEC reliability test standard; It provides high-precision and high-voltage output, and saves records high-precision current, controllable temperature and other parameters, and according to the recorded test data, export experiment tables and MAP diagrams in multiple formats.

Function

Customized probe station, supporting ≤3 wafers simultaneous burn-in test
Support the independent protection function of each wafer die, and control the over-current and over-voltage beyond the limit
Support nitrogen protection to prevent wafer oxidation, and support overvoltage protection when filling
Support to change the probe card to different packaged devices for test
Support wafer mounting contact spot detection, real-time temperature and pressure detection
Support HTGB, HTRB and other burn-in test functions, Vth/IDS/IGS and other parameters of automatic testing and data analysis
Support built-in wafer layout MAP configuration, real-time display of data and query of historical data
Support SECS-II protocol and access to the centralized control station (smart core protection cloud) system, customized docking with the MES system

Product Features

Test temperature zone	1 (Support customization ≤3)
Test temperature	RT~200°C
Applicable products	SiC and other 6-inch and 8-inch wafers
Multi-station parallel test	1 (Support customization ≤3)
Temperature overshoot	<2°C
Grid voltage range (accuracy)	±60V (0.1%±10mV)
Grid current range (accuracy)	HTGB: 0.1nA~0.1mA (1%±5LSB) (Single Station) Vth: 20mA (0.1%±20uA) (Single Station)
Drain voltage range (accuracy)	2000V (0.5%*Vmax±1000mV)
Drain current range (accuracy)	1nA~1mA (1%±2LSB) (Single Station)
Voltage and current overshoot	HTRB overshoot<2% HTGB overshoot<200mV
Methods of communication	TCP/UDP network/485 serial port
Operating system	Windows 10 and above
MES system interface	Supports SECS-II protocol for connecting third-party systems and data transmission
Total weight	760Kg±10%
Dimensions of machine	2050mm(W)x1400mm(D)x1750mm(H)
Single-chamber size	1920mm(W)x1250mm(D)x303mm(H)

Applicable standards

AEC Q101、JEP 183、IEC 60749-23、JESD 22-A108F

Applicable components

For high-temperature and high-voltage reliability test of wafers such as SiC, and automatic test and data analysis of Vth, Igs, Ids and other parameters.